正交混频式UHF局放在zynq7处理器上的实现
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引用本文:周寒冰1,张传远1,马晓昆1,王丹丹1,王永贵2,刘 柱2.正交混频式UHF局放在zynq7处理器上的实现[J].计算技术与自动化,2022,(2):40-45
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周寒冰1,张传远1,马晓昆1,王丹丹1,王永贵2,刘 柱2 (1. 北京国电通网络技术有限公司北京 1001922. 国网信息通信产业集团有限公司信通研究院北京 100192) 
中文摘要:UHF(ulatr-high-frequency)局放传感设备中,混频在保留信号相位和幅度细节以及抗干扰方面比包络检波更有优势,但下变频后实信号直接混频必然引入3dB镜像频谱干扰。为了解决干扰问题,采用Xilinx公司主流的zynq7系列作为局放处理器,设计了一套正交混频型局放设备软硬件,提出了一种新型数字正交混频干扰消除方法。与传统哈特利(Hartley)镜像频谱抑制算法在模拟域I、Q路合并方法相比,在zynq处理器内实现了一种通用型的数字移相器,将相位超前的Q路信号数字移相90°后,再与缓存的I路信号进行合并,可完全消除镜像频率干扰,与现有的实数直接相乘混频的局放接收机相比,整体上有3dB灵敏度增益,还降低了硬件成本和冷门电桥芯片采购难题。
中文关键词:信号调理;正交混频;镜像干扰抑制;局放  zynq7 SOC
 
Implementation of Orthogonal Mixer UHF Partial Discharge on zynq7 Processor
Abstract:For ultra-high-frequency partial discharge system, although mixer has some advantages in reserve signal amplitude and phase compared to envelop detector technique. Directly multiply two real signal mixer existed image spectrum interferences in pass band and would bring 3dB Signal-Noise-Rate lost. In order to overcome above problem, applying Xilinx newly zynq7 as PD main processor, connected high speed ADC to FPGA and two cortex-A9 cores finished digital signal process easily. Based on XC7Z015,provided a newly digital partial discharge orthogonal mixer interferences rejected method. Compared to Hartley analogy domain processing method, digital domain utilize field program gate array chip ,implemented a digital phase shifter, then merged I,Q channel into one signal, this orthogonal frequency mixer brough 3dB SNR gain compare to older real mixer.At the same time, UHF receiver avoid circuit bridge integrated chip purchase problem and lower hardware cost.
keywords:signal conditional  orthogonal frequency mixer  image interference rejected  partial discharge  zynq7 SOC
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